In a binary translation (BT) processor, original code is translated by system software and placed in translation storage (e.g., in main memory). The processor may then execute optimized translated code instead of the original code. The possibility of self-modifying code (SMC) or cross-modifying code (XMC), in a multicore processor, may require the BT processor to observe and honor any change to the original code, e.g., the processor may invalidate translations corresponding to modification of the original code. The processor may use a translation protection data structure (TPDS) or similar hardware, such as a translation protection table (TPT), to detect modifications to the original code. While the TPDS may reliably detect SMC/XMC events, the TPDS may not keep track of every page of code that has been translated. As the TPDS is hardware that is to respond to incoming snoops (e.g., coherency messages), the TPDS has a fixed capacity which, when exceeded, results in page entries being evicted. If the TPDS also has limited associativity, collisions are another source of evictions. In existing designs, a TPDS miss results in a trap to BT system software. The overhead is substantial for such interruption and the subsequent running of the software to fill the missing entry in the TPDS.